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OnSiRoC IISequencer code for
Guest on 30th November 2024 05:37:37 AM


  1. { OnSiRoC II Sequencer code for DMILL APC steering with Decoder chip }
  2.  
  3. {       X = 29
  4.         Y = 30
  5.         Z = 31
  6.        
  7.         'ppcf': based on 'ppc1', but faster: only 14*48ns readout, less time for
  8.         specials
  9.        
  10.         use fast sequencer clock for Decoder loading
  11.         use FAST sequencer clock for sample phase
  12.         use SLOW sequencer clock for re-read
  13.         use FAST sequencer clock for readout
  14.  
  15.         Read out 10 APC128s: 5 'early' and 5 'late'
  16.        
  17.         Ireg = 000 1000 for DMILL
  18.  
  19.         Add 8 special events at end of readout. 25 CONVERTS PER SPECIAL 18.7.96
  20. }
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